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 Intelligent Double Low-Side Switch 2 x 2 A
TLE 4211
Bipolar IC
Features
q q q q q q q q q
Double low-side switch, 2 x 2 A Power limitation Overtemperature shutdown Status monitoring Shorted-load protection Reverse polarity protection Integrated clamp Z-Diodes Voltage proof up to 70 V Temperature range - 40 to 125 C
P-TO220-7-1
Type TLE 4211 Application
Ordering Code Q67000-A8118
Package P-TO220-7-1
Applications in automotive electronics require intelligent power switches activated by logic signals, which are shorted-load protected and provide error feedback. The IC contains two of these power switches (low-side switch). In case of inductive loads the integrated power Z-diodes clamp the discharging voltage. With TTL signals at the control inputs (active low) both switches can be activated independently of one another. If one of the inputs is not in use, it must be applied to high potential. The status output (open collector) signals the following malfunctions through low potential:
q q q q
Overload, Open load, Output shorted to ground, Overvoltage.
Semiconductor Group
1
10.96
TLE 4211
Pin Configuration (top view)
Semiconductor Group
2
TLE 4211
Pin Definitions and Functions Pin No. 1 Symbol Function STA Status output (open collector) for both outputs; indicates overload, open load and shorted load to ground as well as overvoltage at pin 7. In case of malfunction the status output is switched to low after a delay time (except overvoltage). Control input 1 (TTL-compatible) activates output transistor 1 in case of low-potential. Output 1 Shorted-load protected, open collector output with 36 V clamp Z-diode to ground. Ground Wiring must be designed for a max. short-circuit current (2 x 3.5 A). Output 2 Shorted-load protected, open collector output with 36 V clamp Z-diode to ground. Control input 2 (TTL-compatible) activates output transistor 2 in case of low-potential. Supply voltage In case of overvoltage at this pin large sections of the circuit are deactivated. The status output indicates the malfunction without delay time.
2 3
IN1 Q1
4 5
GND Q2
6 7
IN2
VS
Semiconductor Group
3
TLE 4211
Block Diagram
Semiconductor Group 4
TLE 4211
Circuit Description Input Circuits The control inputs comprise TTL-compatible Schmitt triggers with hysteresis. Driven by these stages the inverting buffer amplifiers convert the logic signal for driving the NPN power transistors. Switching Stages The output stages comprise NPN power transistors with open collectors. Since the protective circuit allocated to each stage limits the power dissipation, the outputs are shorted-load protected to the supply voltage throughout the entire operating range. Positive voltage peaks, which occur during the switching of inductive loads, are limited by the integrated clamp Z-diodes. Monitoring and Protective Functions The outputs are monitored for open load, overload, and shorted output to ground (see table below). In addition, large sections of the circuit are de-activated in case of excessive supply voltages VS. Linked via OR gate the information regarding these malfunctions effects the status output (open collector, active low). An internally determined delay time applied to all malfunctions but overvoltage prevents the output of messages in case of short-term malfunctions. Furthermore, a temperature protection circuit prevents thermal overload. An integrated reverse diode protects the supply voltage VS against reverse polarities. Similarly the load circuit is protected against reverse polarities within the limits established by the maximum ratings (no shorted load at the same time!). At supply voltages below the operating range an undervoltage detector ensures that neither the status nor the outputs are activated.
Status Output (L = Error) Undervoltage Operating Range Overvoltage
VI = L
(active) Normal function Overload Open load Shorted output to ground H H H H H L L L
VI = H
(passive) H H H L L L L L
Semiconductor Group
5
TLE 4211
Circuit Diagram
Semiconductor Group 6
TLE 4211
Absolute Maximum Ratings
Tj = - 40 to 150 C
Parameter Symbol min. Limit Values max. Unit
Voltages Supply voltage (pin 7) 1) Supply voltage (pin 7) t 500 ms Input voltage (pin 2; pin 6) Output voltage (pin 1)
VS VS VI VO
- 45 - -5 - 0.3
45 70 45 45
V V V V
Currents Switching current (pin 3; pin 5) IQ Current with reverse polarity (pin 3; pin 5) IQ TC 85 C Output current (pin 1) IQ Max. current at inductive load Junction temperature Storage temperature limited internally - 2.2 - - - - - 50 10
see Diagram
A mA
IQ Tj Tstg
150 150
C C
Operating Range Supply voltage Supply voltage slew rate Case temperature Thermal resistance junction to case junction to ambient
1) 2)
VS
dVS/dV
5.6 -1
2)
20 1 125 4 65
V V/s C K/W K/W
TC Rth JC Rth JA
- 40 - -
Refer to monitoring and protective functions Lower limit = 4.6 V, if previously VS greater than 5.6 V (turn-on hysteresis)
Semiconductor Group
7
TLE 4211
Characteristics
VS = 6 to 18 V and Tj = - 40 to 125 C
Parameter Symbol Limit Values min. General Characteristics Quiescent current Supply voltage Supply overvoltage shutdown threshold Open load error threshold voltage Open load error threshold current Open load error threshold current for both channels active Logic Control input H-input voltage L-input voltage Hysteresis of input voltage H-input current L-input current Status output (open coll.) L-saturation voltage Status delay time
1)
Unit
Test Condition
typ.
max.
IS IS VSO VQU IQU IQU
- - 34 - - -
3.5 100 36 40 50 -
10 180 42 - 120 250
mA mA V mV mA mA
VI = VI > VIH VI = VI < VIL IO = 5 mA; VO < 0.4 V IO = 5 mA; VO < 0.4 V VQ = VQU VQ1 = VQ2 = VQU
VIH VIL
VI
- 0.7 -
1.7 1.1 0.6 - - -
2.4 - - 10 10 0.4
V V V A A V
- - -
IIH - IIL VOSat
-
- -
VI = 5 V VI = 0.5 V IO = 5 mA
tdS
12
20
30
s
1)
Period from the beginning of the disturbance at one channel (exception: overvoltage) until the 50 % value of the status switching edge is reached.
Semiconductor Group
8
TLE 4211
Characteristics (cont'd)
VS = 6 to 18 V and Tj = - 40 to 125 C
Parameter Symbol Limit Values min. Power Output Saturation voltage Leakage current Switch-ON time Switch-OFF time Output voltage Negative clamp typ. max. Unit Test Condition
VQSat IQ tD ON tD OFF
- VQF
- - - - -
0.6 - 0.5 2.5 1.4
0.8 300 5 10 1.8
V A s s V
IQ = 1.6 A; VI < VIL; Tj = 25 C VQ = 6 V; VI > VIH
see Timing Diagram;
IQ = 1 A IQ = - 2.0 A
Power Clamp Diode (VS = 42 V; S1 open) Output voltage positive clamp Serial resistance
VQZ rz
34 -
36 2
40 -
V
IQ = 0.1 A
0 A < IQ < 2 A
Semiconductor Group
9
TLE 4211
Test Circuit
Timing Diagram
Semiconductor Group
10
TLE 4211
Application Circuit
C* is to be dimensioned such that e.g. in case of a battery voltage failure the maximum ratings of the IC are not exceeded by the recirculation energy L1, L2.
Semiconductor Group
11
TLE 4211
Output Voltage VQ versus Output Current IQ
Shorted Load Current IQ0 versus Output Voltage VQ
Status Signal Threshold versus Chip Temperature Tj
Maximum Load Current IL versus Load Inductance L
Semiconductor Group
12
TLE 4211
Package Outlines P-TO220-7-1 (Plastic Transistor Single Outline)
Sorts of Packing Package outlines for tubes, trays etc. are contained in our Data Book "Package Information". SMD = Surface Mounted Device
Dimensions in mm
Semiconductor Group
13
GPT05108


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